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[Wrk in Progress] ASRock Fatality Z68 Pro Gen3 Bios P1.30


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okkkkayy :)


I try to fix it to have a perfect Base. i like to learn "how to" myself


the latest error from bios 1.30 after IASL compil was :


_T_0 > T_0

_T_1 > T_1

Line 3014 in asl : Acquire (MUT0, 0x0FFF) > Acquire (MUT0, 0x0FFFF)


And my compil is perfect :D (newbie and very happy :lol: )


applying your patch to this Bios V1.30, No error, i'm trying to test it as fast as i can !

(go to bed now)


Thx again !

AsrockZ68FPG3Bios130.zip

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i try the DSDT :


Osx 10.7.2, Chameleon v2.1svn r1683, DSDT.aml


Probably some fix to add :


I have yellow icon problem

Applecpuintelpowermanagement kernel panic : Using nullcpupowermanagement to avoid this problem.


i precise my speedstep is disabled in bios : this is the cause ?

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Try IOAHCIBlockStorageInjector.kext


You probably need this

www.insanelymac.com/forum/index.php?showtopic=258611

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Hi.


Patching the AICPUPM, and NO kernel panic at boot !


But, Deepsleep mode don't work correclty, and the powerbutton make the computer go into deepsleep mode.


I'm unable to wake it correctly. The screen stay black and i can see the PostCode on the mobo continuously make some loop.


have you an idea ?

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  • 2 weeks later...

The other problem : 2 GTX560Ti, used in SLi in Seven. For Osx, i try the GFX string edited with Plist editor,etc....


With one Card, no problem, all is ok, i can obtain QE/CI,CUDA, 1920x1080,etc... with Gfx string.

I'm trying to do this with a modded in.plist for two cards, it works partially, and the most annoying thing, only have low resolution.


You need to modify the NVDAGF100Hal.kext with the correct Id.

And unfortunaltely if you want the correct resolution,you must apply GraphicsEnabler, but you have a beautiful hang on the apple screen

just after the "DSMOS has arrived".


There's a solution, modifying the DSDT like this :

(taken from DSDT.aml, see infidelcompany post 247&248 here : http://www.insanelymac.com/forum/index.php?showtopic=260074&st=240)


Device (PEG3)

{

Name (_ADR, 0x00030000)

Device (GFX3)

{

Name (_ADR, Zero)

Method (_DSM, 4, NotSerialized)

{

Store (Package (0x20)

{

"AAPL,slot-name",

Buffer (0x0A)

{

"PCI-E 16x"

},

"@0,compatible",

Buffer (0x0B)

{

"NVDA,NVMac"

},

"@0,device_type",

Buffer (0x08)

{

"display"

},

"@0,name",

Buffer (0x0F)

{

"NVDA,Display-A"

},

"@1,compatible",

Buffer (0x0B)

{

"NVDA,NVMac"

},

"@1,device_type",

Buffer (0x08)

{

"display"

},

"@1,name",

Buffer (0x0F)

{

"NVDA,Display-B"

},

"NVPM",

Buffer (0x1C)

{

/* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0018 */ 0x00, 0x00, 0x00, 0x00

},

"NVCAP",

Buffer (0x18)

{

/* 0000 */ 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00,

/* 0008 */ 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A,

/* 0010 */ 0x00, 0x00, 0x00, 0x00

},

"VRAM,totalsize",

Buffer (0x04)

{

0x00, 0x00, 0x00, 0x80

},

"device_type",

Buffer (0x0D)

{

"NVDA,GeForce"

},

"model",

Buffer (0x1A)

{

"NVIDIA GeForce GTX 560 Ti"

},

"rom-revision",

Buffer (0x0F)

{

"70.24.11.00.G0"

},

"@0,connector-type",

Buffer (0x04)

{

0x00, 0x08, 0x00, 0x00

},

"@1,connector-type",

Buffer (0x04)

{

0x00, 0x08, 0x00, 0x00

},

"hda-gfx",

Buffer (0x0A)

{

"onboard-1"

}

}, Local0)

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Return (Local0)

}

}


But, hehe, i don't have your skill and knowledge in DSDT editing.

Can you help me to integer this in Z68 fatality DSDT please ?

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What's the problem inserting the code?


You have to look in ioreg where to put it http://Olarila.com/forum/viewtopic.php?f=19&t=609

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the problem is not inserting, it's more:


How to insert : Properly (i think i forget to precise : "properly", sorry) in my DSDT.


i've seen your topic before i asked my question, like i said before, i don't have your skill and knowledge.

This is why i ask about that, because my DSDT don't have the same structure, it's similar , of course.


The problem is my DSDT contain some section concerning GFX, because the mobo have integrated video Port, using the sandybridge possibility.

The problem is: Which section i must modify to obtain the correct result ?


i think this one is for IGP :


Device (GFX0)

{

Name (_ADR, 0x00020000)

Name (OPBS, 0xFFFFFF00)

Method (OPBA, 0, NotSerialized)

{

Store (ASLS, Local0)

If (LEqual (Local0, 0xFFFFFFFF))

{

Store (0xFF000000, Local0)

}

Return (Local0)

}

Scope (^^PCI0)

{

OperationRegion (MCHP, PCI_Config, 0x40, 0xC0)

Field (MCHP, AnyAcc, NoLock, Preserve)

{

Offset (0x60),

TASM, 10,

Offset (0x62)

}

}

OperationRegion (IGDP, PCI_Config, 0x40, 0xC0)

Field (IGDP, AnyAcc, NoLock, Preserve)

{

Offset (0x12),

, 1,

GIVD, 1,

, 2,

GUMA, 3,

Offset (0x14),

, 4,

GMFN, 1,

Offset (0x18),

Offset (0x8C),

CDCT, 10,

Offset (0x8E),

Offset (0xA8),

GSSE, 1,

GSSB, 14,

GSES, 1,

Offset (0xBC),

ASLS, 32

}

Name (M512, 0x08)

Name (M1GB, 0x10)

OperationRegion (IGDM, SystemMemory, OPBA (), 0x2000)

Field (IGDM, AnyAcc, NoLock, Preserve)

{

SIGN, 128,

SIZE, 32,

OVER, 32,

SVER, 256,

VVER, 128,

GVER, 128,

MBOX, 32,

Offset (0xE0),

KSV0, 32,

KSV1, 8,

Offset (0xF0),

IBTT, 8,

IPSC, 8,

IPAT, 8,

IBIA, 8,



But i'm not sure.... :roll:

I want to learn, i don't ask to you to do the work but just indicate me How, and Which section i must modify to obtain a correct DSDT.

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I have no idea where to insert the code, you have to look in ioreg. Search for the nVidia card and look the name and address of its parent (look the sample screenshot in that topic).

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The 4 PCI-express connector :


Device (P0P1)

{

Name (_ADR, 0x00010000)

Method (_PRW, 0, NotSerialized)

{

Return (GPRW (0x09, 0x04))

}

Method (_PRT, 0, NotSerialized)

{

If (PICM)

{

Return (AR01)

}

Return (PR01)

}

}

Device (P0P2)

{

Name (_ADR, 0x00010001)

Method (_PRW, 0, NotSerialized)

{

Return (GPRW (0x09, 0x04))

}

Method (_PRT, 0, NotSerialized)

{

If (PICM)

{

Return (AR02)

}

Return (PR02)

}

}

Device (P0P3)

{

Name (_ADR, 0x00010002)

Method (_PRW, 0, NotSerialized)

{

Return (GPRW (0x09, 0x04))

}

Method (_PRT, 0, NotSerialized)

{

If (PICM)

{

Return (AR03)

}

Return (PR03)

}

}

Device (P0P4)

{

Name (_ADR, 0x00060000)

Method (_PRW, 0, NotSerialized)

{

Return (GPRW (0x09, 0x04))

}

Method (_PRT, 0, NotSerialized)

{

If (PICM)

{

Return (AR04)

}

Return (PR04)

}

}

}

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I don't understand. It must be inside one of them, not all 4.

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